FAST FOURIER TRANSFORMATION BASED FINITE IMPULSE RESPONSE FILTER

Abstract

This article examines the challenges of hardware implementation of high-order finite impulse response (FIR) digital filters. The relevance of this topic stems from the fact that the direct implementation of FIR filters requires a quadratic number of multiply-accumulate operations, O(N2). This leads to the rapid exhaustion of specialized computational resources on the chip and causes unacceptable delays in hardware implementation. The aim of the study is to solve the problem of computational complexity of traditional FIV filters by moving to the frequency domain using the Fast Fourier Transform algorithm. The research methods are based on the fundamental theorem, which states that convolution in the time domain is equivalent to the pointwise product of spectra in the frequency domain. The use of the FFT allows for a significant reduction in computational complexity to O(Nlog N ).

It has been proven that the use of the FFT effectively solves the problem of computational complexity of FIR filters. The application of overlapping algorithms ensures reliable block-by-block processing of infinite data streams. It has been established that the hardware implementation of such systems on FPGA guarantees architectural flexibility and the possibility of massive parallelism, which traditional DSP microprocessors lack. As a result, FFT-based FIR filters remain the standard for developing high-performance digital signal processing systems.